VLSI POSTIONS_ONSITE

3 - 8 Years
Bengaluru, Hyderabad, Noida

Job Description

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Full Chip Verification Engineer - BLR / Noida / Hyd / Malaysia
Qualification: BTech / Mtech / BE / ME
Experience Level: 5-10 yrs

Job Description: FCV verification.
Good verification skills (Verilog, system Verilog)
Well versed with digital design fundamentals
Knowledge of UVM methodology.


Verification Engineer BLR / Noida / Hyd / Malaysia
Job Description
Verification of IP blocks
Qualification: B.Tech or M.Tech in Electrical or Electronics Engg
Experience Level: 5-7years


Basic Job Deliverable:
Develop UVM test bench for IP blocks
Write and execute test cases
Work on the closure of functional and code coverage

Requirements
Experience in the verification of CPU/Video/DSP/vector processors, SIMD, etc. is preferred
Strong foundation in SoC architecture and verification of multi-core processors including SIMD, Vector processors, floating point, etc. is a plus
Expertise in Verilog/System Verilog, C/C++/SystemC, UVM, Scripting languages like Perl/Python, etc.


Required Details:

Current Employer/Work Location:
CCTC:
ECTC:
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DOB:
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Total Exp:
Rel Exp:

Salary: Not Disclosed by Recruiter

Industry:Semiconductors / Electronics

Functional Area:IT Hardware, Technical Support, Telecom Engineering

Role Category:IT Hardware

Role:Hardware Design Engineer

Employment Type:Permanent Job, Full Time

Key Skills

Desired Candidate Profile

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Company Profile

Kaizen SRA Technologies Pvt. Ltd.
Kaizen SRA Technologies Pvt. Ltd.
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Contact Company:Kaizen SRA Technologies Pvt. Ltd.

Email :sureshm@kaizentek.com