Full Chip Verification Engineer - BLR / Noida / Hyd / Malaysia
Qualification: BTech / Mtech / BE / ME
Experience Level: 5-10 yrs
Job Description: FCV verification.
Good verification skills (Verilog, system Verilog)
Well versed with digital design fundamentals
Knowledge of UVM methodology.
Verification Engineer BLR / Noida / Hyd / Malaysia
Verification of IP blocks
Qualification: B.Tech or M.Tech in Electrical or Electronics Engg
Experience Level: 5-7years
Basic Job Deliverable:
Develop UVM test bench for IP blocks
Write and execute test cases
Work on the closure of functional and code coverage
Experience in the verification of CPU/Video/DSP/vector processors, SIMD, etc. is preferred
Strong foundation in SoC architecture and verification of multi-core processors including SIMD, Vector processors, floating point, etc. is a plus
Expertise in Verilog/System Verilog, C/C++/SystemC, UVM, Scripting languages like Perl/Python, etc.
Current Employer/Work Location:
Education/Year of Passing:
Salary: Not Disclosed by Recruiter
Industry:Semiconductors / Electronics
Functional Area:IT Hardware, Technical Support, Telecom Engineering
Role Category:IT Hardware
Role:Hardware Design Engineer
Employment Type:Permanent Job, Full Time
Desired Candidate Profile
Contact Company:Kaizen SRA Technologies Pvt. Ltd.